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The New DRAMs for Main Memory and Graphics

A comprehensive full-day seminar on the current and future commodity DRAM marketplace by the industry's leading independent systems-oriented analyst.

Presenter: Steven Przybylski, Principal Consultant

Summary
Outline
Who Will Benefit From This Seminar
Detailed Table of Contents
Examples From the Presentation

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General-Admittance Presentations:

• No general admittance presentations are scheduled for the second half of 1998
• To inquire about corporate presentations, please send email to Verdande Customer Service
  

Summary

A short year after the PC industry abruptly shifted to EDO DRAMs, it is transitioning again--this time to Synchronous DRAMs. Even as the industry adjusts to this new architecture, Intel and the DRAM vendors are indicating that another major change is less than two years away.

• Why so many new alternatives now?
• What is the real impact of these changes on PCs and other system types?
• What are the appropriate new criteria for selecting a DRAM architecture?
• What are the consequences of Intel's selection of Rambus for the next generation?

These and many other questions are answered in this full-day seminar presented by one of the DRAM industry's leading independent systems-oriented analysts.

Outline

This seminar is the most comprehensive review of DRAM technology offered. You will walk away with the most important assets possible for decision making: an understanding of how the alternatives stack up and which are most likely to succeed. The seminar covers:

• All aspects of the dramatic changes occurring in the DRAM and VRAM marketplaces.

• The short and long term impact of the computer system and semiconductor processing trends driving this rapid rate of change and the proliferation of DRAM architectures.

• The technical and market strengths and weaknesses of each of the new alternatives.
  
  • For main memory: EDO, Burst EDO, SDRAM, EDRAM, CDRAM, Rambus, and SLDRAM (Synclink);
    
  • For video applications: EDO, VRAM, SDRAM/SGRAM, Rambus, MDRAM, WRAM, 3-D RAM, and integrated GUI accelerator/frame buffers.

• The impact of the new DRAM architectures and declining prices on system architecture, especially with respect to 3-D graphics, AGP, and unified memory architectures.

• An analysis of merged DRAM/logic devices that identifies the applications that will profitably take advantage of this new category of device within the short, medium, and long terms.

Morning: The seminar begins with the basic computer system and semiconductor processing trends that are motivating the many new DRAM architectures. A new metric is introduced that clearly illustrates why the DRAM industry is in such turmoil now. More significantly, this unique analysis highlights the ongoing challenges that face the industry as it moves toward the 256-Mbit and 1-Gbit generations. The morning concludes with a detailed examination of the characteristics, strengths and weaknesses of the many variations of the new main memory DRAMs: EDO, Burst EDO, SDRAM, EDRAM, CDRAM, RDRAM, and SynchLink.

Afternoon: The seminar's second half analyzes the important differences between main memory and graphics uses of DRAMs. All the graphics-oriented DRAMs are also contrasted: EDO, VRAM, SDRAM and SGRAM, RDRAM, MDRAM, WRAM, 3D-RAM. Additionally, the impact of the new DRAM technologies on system architecture will be discussed in the context of the Accelerated Graphics Port (AGP), Unified Memory Architecture (UMA), and the cost-performance trade-offs of processor speed versus memory size.

Finally, the growing attractiveness of combining logic and DRAM in a single device will be explored in depth from the merged perspectives of technology capabilities and application requirements. After characteristics of several recently announced merged DRAM/logic products are described, a road map highlighting those applications best suited to take advantage of this new class of device will be developed.

Who Will Benefit:

• All designers, marketers, analysts and members of the press needing either a general or detailed understanding of the new commodity DRAMs.
  
• Microprocessor system designers responsible for selecting a memory architecture for next-generation designs.
  
• Designers of chip sets, memory controllers, and graphics controllers deciding which memories and system architectures to support.
  
• System-level architects tracking fundamental technology shifts three to five years into the future.
  
• DRAM designers and marketers needing better insight into the system issues affecting the success and failure of their devices.
  

Detailed Table of Contents

• Introduction
• Contents and Goals
• Background
  • What is a DRAM
  • How DRAMs are aggregated into memory systems
  • How are the performance of DRAMs and memory systems measured

• Motivation
  • Semiconductor and DRAM Trends
  • Computer System Trends
  • Performance Trends
  • A Vital New Metric: Fill Frequencies
  • Implications for the 64-Mbit, 256-Mbit, and 1-Gbit Generations
  • Conclusions

• Conventional Alternatives For Main Memory
  • Extended Data-Out (EDO) DRAMs
  • Wide EDO DRAMs

• Evolutionary Alternatives
  • Burst EDO (EDO) DRAMs
    • What happened to Burst EDO and Why?
  • EDRAMs and ESDRAMs
  • SDRAMs and DDR SDRAMs
    • How long will SDRAMs last?
    • What are DDR SDRAMs and will they be used?
  • CDRAMs
  • SLDRAMs (Synclink)
    • Are SLDRAMs a credible alternative to Direct RDRAMs?

• Revolutionary Alternatives
  • Rambus
    • What is the impact of the Intel/Rambus collaboration?
    • What are the likely characteristics of their new Direct RDRAM?

• Summary of the Morning Presentation
  • Comparison of the main memory alternatives
  • Sustainable Fill Frequencies

• Characteristics of Graphics and Video
  • Why graphics-oriented DRAMs exist
  • The basic graphics architectures
  • 2-D versus 3-D graphics

• Dual-Ported Video RAMs
  • VRAMs
  • WRAMs
  • 3-D RAMs

• New Single-Ported Video RAMs
  • SDRAM, SGRAMs and DDR SGRAMs
  • RDRAMs as Graphic RAMs
  • MoSys MDRAMs

• Unified Memory Architecture (UMA)
  • What is UMA
  • Market and technology motivations and disincentives
  • Prognosis

• Accelerated Graphics Port (AGP)
  • What is AGP
  • Rationale and Impact
  • Prognosis

• System Tradeoffs Involving Main Memory
  • Performance implications of the new DRAMs
  • Trading off cache size for DRAM architecture
  • Trading off CPU speed and memory size

• Merged DRAM/Logic Devices
  • Rationale for Merged DRAM/Logic Devices
  • Examples of Embedded DRAMs
  • Applications for Embedded DRAMs
  • Integrated Frame Buffers for portable systems
  • Roadmap for Embedded DRAMs through the 1-Gbit generation

• The Changing DRAM Marketplace
  • Reasons for the changing market dynamics
  • The impact of continuing market fragmentation
  • The impact of Intel's proactive intervention in the area of DRAM architecture
    

• Conclusion
  • Summary of the afternoon topics
  • Prognosis for the 64-Mbit generation
  • Prognosis for the 128- and 256-Mbit generation
  • Prognosis for the 1-Gbit generation
  • Conclusions
  • Question and answer session
    

Examples From The Presentation Materials

• Agenda for the day: PDF
• The power of the new Fill Frequency metric: PDF
• First-order comparative chart of the new architectures: PDF
• Double-data-rate SDRAMs: PDF
• Rambus RDRAMs: PDF
• SLDRAMs (SyncLink): PDF
• Prognosis for the 256-Mbit generation: PDF
  

Questions?  Send mail to cs@verdande.com for further details

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